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8-bit acorn hardware • Re: master revision 1 voltage at PL8 outer pins rises

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It is the outer 'GND' pins which are rising above 5V when measured against the GND spade nearby. I don't have any cable or battery connected because when I got it from storage the batteries had leaked and the cable broke off the battery carrier.
I suspect that what you are measuring here isn't real.

Essentially those pins should be open-circuit while the power is on (the FET is gated off). There's not really any source of voltage to leak in to the pin from the on-board circuit, but equally there's no way for any externally-applied voltage to be conducted away. Maybe the combination of the meter and the capacitance of the Master circuit is rectifying 50Hz pickup on the wires?

Statistics: Posted by arg — Fri Apr 12, 2024 8:12 pm



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