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programming • Re: Direct access to SN76489: timing

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Mine is also happening after DDRA is set. I only included the write to DDRA in the example to show it can be done after the write to PORTA and provide a complete example. On CPU cycle counts, yours seems more tolerant to part/crystal timing fluctuations. I'll test on a few more physical machines.

Statistics: Posted by SamSkivington — Sun Apr 06, 2025 7:12 pm



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