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programming • Re: CPLD Coding - Boolean vs Bitwise Operations

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I think that's me pretty much finished with the CPLD coding. I had to make a minor tweak to the switching logic to get some of the PALPROMs working correctly. This is what I initially had:

Code:

wire pp4Clk = (!nRDS && GenBankSel[10]) || !bbc_nRST;always @(posedge pp4Clk) begin
and this is what I changed it to to get it working correctly:

Code:

wire pp4Clk = !((!nRDS && GenBankSel[10]) || !bbc_nRST);always @(negedge pp4Clk) begin
I thought both would have done the same thing, but that wasn't the case!

With that change, I have been able to emulate 13 different PALPROMs on my IntegraB board. The only slight niggle I have is that I run out of space if I try to implement the final PALPROM type without removing one of the other types. Basically, I can build the code to run MEGA3 / SpellMaster (Computer Concept 128K PALPROMs), or I can build the code to run Wapping editor (Watford Electronics 64K PALPROM), but I can't add both types, with a toggle to switch between them.

The Mega3 / SpellMaster switching logic is at lines 713..729
The Watford Electronics switching logic is at lines 694..711 (currently commented out)
The combined switching logic is at lines 731..756 (currently commented out)
An alternative combined switching logic is at lines 758..787 (currently commented out)

Can anyone see any further optimisation opportunities, that would allow me to build the code using the combined switching logic? Unfortunately, I can't move the I/O around. That ship sailed a long time ago. I have to stick with the current pin assignments.

Note that the code is very sensitive to some very small changes. For example, remove the '|| !bbc_nRST' check from the above 'wire pp4Clk' line, and I run out of space again! But sometimes I can make a relatively big change, and it will still fit. This makes it very difficult to know what the right answer should be!

Thanks!

Statistics: Posted by KenLowe — Sat Aug 10, 2024 4:57 pm



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