I'm doing a bit of CPLD code tidy up for the XC95144XL on my V2 IntegraB board and the fitter is struggling to fit all the code in under certain circumstance. I'm using the XILINX ICE Project Navigator (on an old Win7 VM) for code development.
The odd thing is, if I switch some of the logic from using boolean to bitwise operators, it changes how the fitter behaves, and code that doesn't fit when using one type of operator will fit when using the other type.
As an example, the following code snippet is using boolean operators, and the fitter can't fit everything in (I'm using exhaustive fitting with the fitter set to density optimisation).
If I change the code snippet to use bitwise operators instead, it fits fine:Is this expected behaviour? It also seems to work fine on my board, when compiled using the bitwise operators, but I'm not sure if there's any downside with doing this?
Does anyone have any experience with this, and able to offer any advice?
Edit: Here's another example...
Won't fit:Will fit:
The odd thing is, if I switch some of the logic from using boolean to bitwise operators, it changes how the fitter behaves, and code that doesn't fit when using one type of operator will fit when using the other type.
As an example, the following code snippet is using boolean operators, and the fitter can't fit everything in (I'm using exhaustive fitting with the fitter set to density optimisation).
Code:
assign nRDS = !( RnW && Phi2 && !long_CLR);// nWDS is normally just !( RnW & !Phi1) but we check for Write protect and hold nWDS high is Write Protect is active.// nWDS needs to consider all 16 RAM banks AND the Shadow RAM Bank. However, shadow RAM is NEVER write protected.// Default Write Protect strategy, where both onboard RAM and external sockets can be soft Write Protected.assign nWDS = !((!RnW && Phi2 && GenBankSel[0] && WP[0]) || (!RnW && Phi2 && GenBankSel[1] && WP[1]) || (!RnW && Phi2 && GenBankSel[2] && WP[2]) || (!RnW && Phi2 && GenBankSel[3] && WP[3]) || (!RnW && Phi2 && GenBankSel[4] && WP[4]) || (!RnW && Phi2 && GenBankSel[5] && WP[5]) || (!RnW && Phi2 && GenBankSel[7] && WP[7]) || (!RnW && Phi2 && GenBankSel[8] && WP[8]) || (!RnW && Phi2 && GenBankSel[9] && WP[9]) || (!RnW && Phi2 && GenBankSel[10] && WP[10]) || (!RnW && Phi2 && GenBankSel[11] && WP[11]) || (!RnW && Phi2 && GenBankSel[12] && WP[12]) || (!RnW && Phi2 && GenBankSel[13] && WP[13]) || (!RnW && Phi2 && GenBankSel[14] && WP[14]) || (!RnW && Phi2 && GenBankSel[15] && WP[15]) || (!RnW && Phi2 && ShadowSel));Code:
assign nRDS = !( RnW & Phi2 & !long_CLR);// nWDS is normally just !( RnW & !Phi1) but we check for Write protect and hold nWDS high is Write Protect is active.// nWDS needs to consider all 16 RAM banks AND the Shadow RAM Bank. However, shadow RAM is NEVER write protected.// Default Write Protect strategy, where both onboard RAM and external sockets can be soft Write Protected.assign nWDS = !((!RnW & Phi2 & GenBankSel[0] & WP[0]) | (!RnW & Phi2 & GenBankSel[1] & WP[1]) | (!RnW & Phi2 & GenBankSel[2] & WP[2]) | (!RnW & Phi2 & GenBankSel[3] & WP[3]) | (!RnW & Phi2 & GenBankSel[4] & WP[4]) | (!RnW & Phi2 & GenBankSel[5] & WP[5]) | (!RnW & Phi2 & GenBankSel[7] & WP[7]) | (!RnW & Phi2 & GenBankSel[8] & WP[8]) | (!RnW & Phi2 & GenBankSel[9] & WP[9]) | (!RnW & Phi2 & GenBankSel[10] & WP[10]) | (!RnW & Phi2 & GenBankSel[11] & WP[11]) | (!RnW & Phi2 & GenBankSel[12] & WP[12]) | (!RnW & Phi2 & GenBankSel[13] & WP[13]) | (!RnW & Phi2 & GenBankSel[14] & WP[14]) | (!RnW & Phi2 & GenBankSel[15] & WP[15]) | (!RnW & Phi2 & ShadowSel));Does anyone have any experience with this, and able to offer any advice?
Edit: Here's another example...
Won't fit:
Code:
assign PrvAct = ((bbc_ADDRESS[15:12] == 4'h8) && (bbc_ADDRESS[11:10] == 2'b00) && PrvS1 && PrvEn //address decodes to &8000..&83FF. Maps to &0000..&03FF in Shadow RAM || (bbc_ADDRESS[15:12] == 4'h8) && PrvS4 && PrvEn //address decodes to &8000..&8FFF. Maps to &0000..&0FFF in Shadow RAM || (bbc_ADDRESS[15:12] == 4'h9) && PrvS8 && PrvEn//address decodes to &9000..&9FFF. Maps to &1000..&1FFF in Shadow RAM || (bbc_ADDRESS[15:12] == 4'hA) && PrvS8 && PrvEn);//address decodes to &A000..&AFFF. Maps to &2000..&2FFF in Shadow RAMCode:
assign PrvAct = ((bbc_ADDRESS[15:12] == 4'h8) & (bbc_ADDRESS[11:10] == 2'b00) & PrvS1 & PrvEn //address decodes to &8000..&83FF. Maps to &0000..&03FF in Shadow RAM | (bbc_ADDRESS[15:12] == 4'h8) & PrvS4 & PrvEn //address decodes to &8000..&8FFF. Maps to &0000..&0FFF in Shadow RAM | (bbc_ADDRESS[15:12] == 4'h9) & PrvS8 & PrvEn//address decodes to &9000..&9FFF. Maps to &1000..&1FFF in Shadow RAM | (bbc_ADDRESS[15:12] == 4'hA) & PrvS8 & PrvEn);//address decodes to &A000..&AFFF. Maps to &2000..&2FFF in Shadow RAMStatistics: Posted by KenLowe — Wed Aug 07, 2024 1:50 pm