Hi Dave
I dug a bit in the design and may understand that:
the register values are gathered via a read-only mux, so it's not possible to alter them.
I wonder if there is a way similar to brkpt & watch implementation using shift register:
the regs array may have similar implementation.
* to read registers, we have to shift out all values, store them somewhere then shift them in again, to preseve data.
* to modify registers, those temporary values can be changed before shift them back.
I admit that I don't have enough knowledge on VHDL to try my foolish idea.
Lang
I dug a bit in the design and may understand that:
the register values are gathered via a read-only mux, so it's not possible to alter them.
I wonder if there is a way similar to brkpt & watch implementation using shift register:
the regs array may have similar implementation.
* to read registers, we have to shift out all values, store them somewhere then shift them in again, to preseve data.
* to modify registers, those temporary values can be changed before shift them back.
I admit that I don't have enough knowledge on VHDL to try my foolish idea.
Lang
Statistics: Posted by langlv — Tue Aug 06, 2024 2:10 pm